Preface

This specification is developed in accordance with internationally recognized industry standards, including IPC‑2221, IPC‑6012, IATF 16949, IPC‑1402, and ISO/IEC 16022. It applies to the structural design of single‑board and panelized PCBs across all product categories, such as consumer electronics, industrial control systems, and automotive electronics, with particular emphasis on meeting the high‑reliability, full traceability, and automated mass‑production requirements of automotive applications.

The PCB panelization process edge, mechanical alignment holes, and laser‑etched traceability code areas serve as core mechanical and traceability reference points throughout the entire manufacturing flow—from PCB fabrication and SMT placement to reflow soldering, wave soldering, automated panel separation, and final assembly. In mass production, common defects such as board jams, component‑placement misalignment, tombstoning, poor optical‑recognition performance, broken traceability chains, and inability to trace batch‑level quality issues are, in more than 90% of cases, attributable to upstream design problems—namely, non‑standard panelization geometries, improper layout of process edges, and non‑compliant coding‑area specifications.

 

Chapter 1: Standardized Design Specifications for PCB Process Edges

1.1 Definitions and Functional Positioning

The process edge (also known as the transfer edge or clamping edge) is a purely mechanical feature exclusive to PCB panelization, serving no electrical function and exhibiting no electrical conductivity. It is used solely for SMT rail‑based conveyance, automated fixture clamping, alignment datum placement, and traceability code marking, forming the core load‑bearing structure of automated production lines. Process edges are categorized into the main board’s effective process edge and the dedicated code‑engraving process edge; both types must strictly adhere to unified clearance requirements and dimensional compliance standards.

1.2 Compliance Standards for Process Margin Width

The width of the process edge directly determines conveyor stability, the ability to arrange reference structures, and compliance with marking‑area specifications. All panel assemblies must be manufactured in strict accordance with the grading standards; arbitrary parameter values are prohibited.

General benchmark standard: standard width of 5 mm, with a compliance range of 4–6 mm across the entire product line—making it the preferred specification for the vast majority of mass‑production projects.

Differentiated Adaptation Rules

Small boards (overall dimensions ≤50 mm × 50 mm) and thin boards (board thickness ≤0.6 mm): Must incorporate a 5 mm–6 mm wide process edge to enhance board rigidity, prevent warping, bending, and fracture during handling, and simultaneously meet the requirements for marking‑code placement.

Large‑size thick plates and high‑rigidity sheet materials: with a minimum compliant width of 4 mm, we optimize material utilization while ensuring equipment compatibility and structural stability, thereby controlling production costs.

Enforcement Prohibition Threshold:

* Strictly prohibit process edge widths less than 3 mm: insufficient structural strength, inability to accommodate positioning holes, MARK points, or barcode areas, and a high risk of board deformation, making it incompatible with automated mass production.
* Strictly prohibit process edge widths exceeding 8 mm: Excessive redundancy leads to board material waste, significantly reduces panel utilization, and increases tooling and mass-production costs.

1.3 Comprehensive Hard Avoidance Guidelines for Process Edges

The process edge is a purely mechanical, all‑process, zero‑electrical zone. Regardless of whether marking codes are applied, the full‑clearance rules for electrical components, devices, and silkscreen must be strictly enforced to prevent equipment interference, electrical hazards, and identification anomalies.

1.3.1 Electrical Clearance Requirements

All signal traces, power traces, ground traces, and routing nets are strictly prohibited from encroaching into the process edge area.

The minimum clearance between in‑board traces, copper foil, and copper pour areas and the inner edge of the process margin shall be ≥0.8 mm, ensuring an intact insulating isolation zone.

Within the entire process‑edge area, copper pour, exposed copper, solder‑mask openings, slots, and routing are prohibited; only the mechanical outline layer is retained, with a continuous, smooth solder mask on the surface.

1.3.2 Component and Structural Clearance Requirements

All functional features, including surface-mount components, through-hole pads, test points, connectors, screw holes, locating posts, and gold fingers, must not be placed within the process edge.

Any components, pads, or structural features that span process boundaries or cross design domains are prohibited, thereby completely eliminating defects such as SMT placement collisions, rail interference, and solder shorts.

1.3.3 Screen Printing Standardization Specifications

Permanent functional silkscreen markings, including product model numbers, hardware versions, brand logos, component polarity indicators, and function labels, must all be placed within the valid circuit area of the PCB.

The process edge may only bear temporary production markings such as batch numbers and serial numbers; no permanent product‑specific silkscreened specifications shall be retained.

No silkscreen printing is allowed above, below, to the left, or to the right of the panel‑joining ribs, V‑CUT routing slots, and stamping‑hole areas, to prevent edge chipping during panel separation and interference with optical recognition.

1.4 Process Edge Layout and Process Compliance Requirements

Rectangular standard panels are required to feature double-sided, symmetrical, equal-width process edges along the long sides, ensuring balanced load distribution during conveyance and consistent alignment references.

It is strictly prohibited to use a single-sided process edge or to substitute a short edge for a long edge as the conveyor’s process edge, in order to prevent conveyor misalignment, component placement deviation, and poor batch-to-batch consistency.

In the blank areas along the process edges, MARK points, positioning holes, and traceability engraving zones are uniformly reserved; all reference features are designed to be non‑interfering and non‑overlapping.

V‑CUT slots, panel‑joining ribs, and panel‑separation structures must not extend into the process edge area, ensuring that the process edge remains continuous, flat, free of breaks, and without any protrusions.

 

Chapter 2: Standardized Design Specifications for PCB定位 Holes

2.1 Definitions and Functions

Positioning holes serve as mechanical reference points for SMT automated alignment, carrier fixation, and multi‑process precision machining. They are a core structural element that ensures component placement accuracy, soldering consistency, and stable mass production of panelized assemblies, and are an essential requirement for high‑precision automotive and industrial‑control applications.

2.2 Universal Compliance Standards for Aperture Dimensions

Industry‑preferred standard aperture: Φ3.0 mm, compatible with 99% of automated pick-and-place, inspection, and laser marking equipment.

Alternative compliance apertures: Φ2.5 mm and Φ2.0 mm, for special custom‑equipment projects only.

Mandatory prohibition: The use of Φ＜1.5mm small holes, oval holes, oblong holes, and non-standard shaped holes is prohibited to eliminate positioning deviations and fixture‑fitting failures.

2.3 Standardization Rules for Quantity and Layout

Standard consumer products: come standard with two primary positioning holes, arranged symmetrically along the diagonal on both sides of the process edge.

Automotive, industrial control, and high-precision products: the number of positioning holes has been increased to three, and multi-point fixation further enhances the stability of the board, effectively preventing misalignment during high-precision mounting.

It is strictly prohibited to arrange dual positioning holes side by side on the same side, to prevent board rotation and misalignment, as well as uneven stress distribution that could lead to batch‑level mounting defects.

All positioning holes must be entirely within the process edge area, and it is strictly prohibited to encroach upon the board’s valid routing and component placement zones.

2.4 Safety Spacing Specifications for Hole Positions

The inner wall of the positioning hole shall be at least 1.2 mm from the outer edge of the process margin, ensuring structural integrity of the process margin and preventing cracking or chipping at the hole location.

The edge of the positioning hole shall be at least 1.5 mm away from the effective areas of the circuit traces, components, and solder pads on the module board, thereby completely eliminating structural interference and electrical risks.

2.5 Standardization Requirements for Hole-Body Manufacturing Processes

The design is uniformly non‑metalized with transparent mechanical vias; the vias contain no copper foil, are electrically non‑conductive, and remain fully transparent across the entire board, without any electroplated coating.

Silkscreen printing, solder mask filling, and ink coverage are prohibited within the vias to ensure smooth, well‑defined via walls, thereby preventing fixture jamming and spurious conductive anomalies.

2.6 High-Precision Product Error-Proofing and Mandatory Design

A mass‑produced, in‑vehicle, high‑precision component with unique polarity and non‑reversible mounting: it mandatorily employs a mismatched, keying combination of holes—standard Φ3.0 mm locating holes paired with Φ2.5 mm anti‑misassembly holes—leveraging hole‑diameter differences to prevent reverse or upside‑down installation, thereby eliminating major quality issues such as incorrect assembly, misplacement, and batch scrap.

 

Chapter 3: SMT Optical MARK Point Co-Design Specification

The MARK point serves as the core optical reference for SMT visual alignment and laser marking‑code recognition, and must be co‑located with process edges, positioning holes, and marking‑code areas in a manner that ensures no interference and full compliance across the entire field of view.

Standard specification: A circular reference MARK point is used, with a uniform diameter of Φ1.0 mm, conforming to industry‑standard visual recognition criteria.

Optical Protection Zone: A continuous, unmarked clearance of at least 2 mm is reserved around the MARK pad. Within this zone, there shall be no silkscreen, copper pours, components, obstructions, or areas exhibiting discoloration.

Placement Location: All components are positioned in the process‑edge clearance area, without occupying the effective layout area of the PCB and without overlapping or interfering with the marking area or the positioning holes.

Configuration Quantity: For standard panelization, 2 to 4 full‑board reference MARK points are provided; for high‑density, high‑precision automotive products, additional independent MARK points are added on each unit board to ensure precise component placement and accurate marking.

 

Chapter 4: On-Board PCB Traceability and Marking Specifications

4.1 Scope of Application

This chapter outlines the mandatory compliance standards for automotive products, applicable to all in-vehicle electronic single boards and panelized PCBs. It ensures adherence to the IATF 16949 quality management system, the IPC‑1402 substrate specification, the ISO/IEC 16022 QR code standard, and automakers’ full‑lifecycle traceability requirements. Key provisions address compliant design practices for both the process‑edge common batch code and the board‑specific unique serial number (SN).

4.2 Dimensional Compliance Standards for the Process Edge Engraving Code Area

Prerequisite: The width of the process edge where the engraving code is placed must be ≥5 mm. It is strictly prohibited to apply traceability codes on 4‑mm narrow process edges or non‑standard narrow edges to prevent conveyor‑gripper wear and scanning failures.

Process‑edge common batch code area: a standard 8 mm × 8 mm independent blank no‑solder‑mask area, serving as the panel‑wide common traceability zone.

Single‑board independent SN code area: standard size 10 mm × 10 mm to 12 mm × 12 mm; for high‑density micro‑boards, the minimum size is 8 mm × 8 mm (applicable only to the single‑board area and not to the common process‑edge region).

QR Code Standard: Uniformly adopts the Data Matrix ECC200 code specifically designed for automotive applications, with a standard module size of 5×5 mm and a minimum allowable size of 3×3 mm, fully compliant with the ISO/IEC 16022 international standard.

4.3 Layout of Dual Barcodes on Process Edges and Safety Spacing Standards

Strictly implement the dual‑code traceability system of “one board, one unique SN code + a common batch code for the entire board,” with separate zoning for the two codes to ensure no interference and full compliance across all areas.

4.3.1 Single-Board SN Unique Code Layout

Prioritize placement on the top-side A surface of the PCB, in flat, unoccupied areas near the edge and alignment holes.

The distance from the PCB edge shall be ≥2 mm, and the distance from pads, test points, connectors, and gold fingers shall be ≥1.5 mm.

The clearance from traces and vias shall be ≥1 mm, and the area must be free of copper, vias, silkscreen, components, and cutouts.

4.3.2 Layout of the Process Edge Common Batch Code (Dual-Code Core)

The batch code for the entire panel is centrally positioned along the long edge, in compliance with process‑required placement guidelines, and kept well clear of equipment‑track clamping stress zones to prevent friction‑induced wear, code loss, and scanning failures.

The spacing between board‑splitting features such as V‑CUT notches, stamping holes, and panel‑joining ribs shall be ≥2 mm to prevent stress‑induced damage in the soldering area.

In the public etching area, a 0.2 mm white‑oil‑based square frame is used to define the dedicated zone; within this frame, the copper foil is completely cleared and the solder mask is leveled, ensuring a smooth, uniform substrate for laser engraving.

4.3.3 Rules Prohibiting Two-Code Layouts

It is prohibited for the single-board SN code to overlap with, be too close to, or interfere with the process‑edge batch code.

The placement of any traceability codes is prohibited on narrow process edges (less than 5 mm), damaged process edges, or process edges with routed copper foil.

Mark points, locating holes, and engraved code areas must not overlap or intersect, ensuring that each datum feature remains independent and valid.

4.4 In-Vehicle Dual-Code Traceability Coding Specification

Unique SN code for each board: comprises the factory code, project code, production cycle date, batch number, and individual board serial number, enabling unique traceability for every board.

Process‑edge common batch code (Panel Code): Includes the large‑panel number, the full‑panel production batch, and process‑team information, enabling full‑panel batch traceability.

Auxiliary traceability information: Includes embedded PCB part numbers, revisions, layer counts, board thickness, surface finish processes, and other basic parameters.

The quiet zone around the QR code must be at least 0.5 mm wide, free of ink, screen printing, and any obstructions, to ensure stable scan recognition.

4.5 Laser Marking Process on Process Edges: Process and Quality Standards

Laser Source: Uniformly employs a 355 nm ultraviolet laser, meeting the stringent reliability requirements of automotive applications.

Engraving depth: ≤20 μm; only the surface solder resist is removed, with strict prohibition of damage to the substrate and copper layers, ensuring board reliability.

Recognition Performance: Image‑text contrast ratio ≥ 80%; industrial equipment barcode scanning success rate ≥ 99.5%, with zero batch‑scan failures.

Weather‑resistance and reliability: Withstands 500 high‑low temperature cycles between –40°C and 125°C without code loss; alcohol wiping does not cause code removal; adhesion meets the requirements of IPC‑TM‑650, Class 4B.

Mass-production process parameters: laser power 10–20 W, engraving speed 0.5–1 m/s; trial engraving and reliability verification must be completed prior to mass production.

 

Chapter 5: High-Frequency Design Errors and Standardized Remediation Plan

5.1 Common Process-Related Issues and Corrective Actions

Process edge width < 3 mm: Rectify to the compliant range of 4–6 mm; for small and thin boards, uniformly increase the width to 5–6 mm to meet structural and barcode‑placement requirements.

Traces, copper pours, and exposed copper are present within the process edge: completely clear all traces and copper foil from the area, apply insulation‑free zones across the entire region, and maintain the pure mechanical process‑zone characteristics.

Single-sided process edge and short-side process edge: Rectified to a long-side, double-sided, symmetrical, equal-width process edge to ensure stable conveyance. (Note: Short-side process edges frequently cause pallet‑jamming and board‑dropping incidents during production.)

Component placement and functional silkscreen on the process edge: All are relocated to the board’s active circuit area, leaving only temporary production markings—such as PCB‑fabrication logos and production‑cycle information—on the process edge.

For process edges wider than 8 mm: reduce to within 6 mm to optimize sheet‑material utilization.

Components on the PCB extend beyond the board edge and interfere with the process edge after panelization: either rotate the sub‑board by 90°, or leave sufficient clearance at the process edge and create cutouts to accommodate component placement and soldering.

5.2 Common Issues and Corrective Actions for定位孔

Non-standard small holes and irregular-shaped holes: uniformly replaced with standard Φ3.0 mm non‑metalized mechanical holes.

The positioning holes are located within the board’s effective area: they have been relocated to the compliant process margins on both sides, without consuming any routing space.

Dual-hole arrangement on the same side: reconfigured to a diagonal symmetrical layout; high-precision products are equipped with a third locating hole.

Via metallization: Changed to non-metallized through-holes, with no copper inside and thus non-conductive.

No keying design: Vehicle-mounted products are required to include an additional combination of Φ3.0mm and Φ2.5mm keying holes with different diameters.

5.3 Common Issues and Corrective Measures for Process Edges and Single-Board Two-Code Engraving Areas

If the process edge width is less than 5 mm, arrange the engraving code: first widen the process edge to ≥5 mm, then proceed with arranging the common batch code.

Insufficient dimensions and inadequate clearances in the footprint area: Expand to compliant dimensions to ensure that board edges, components, and traces meet the required safety clearances.

Copper foil, vias, and silkscreen are present within the pad area: thoroughly clear them to ensure the area is flat and free of interference.

Only a single large‑board code and no individual board SN unique code are currently in place: this will be rectified to a two‑code traceability system comprising “individual board SN unique code + process‑edge batch common code.”

Insufficient scan contrast and low recognition rate: Add a white‑oil‑based bounding box and optimize laser parameters to ensure the contrast meets the required standard.

Laser‑engraved boards with excessive depth: Standard vehicle‑mounting process parameters are uniformly adopted, and reliability pilot production verification is completed prior to mass production.

Practical Experience Summary: In real-world improvement projects, an optimal layout should ensure that the placement of panel‑splitting and coding locations accommodates both equipment clamping and barcode scanning, while avoiding positioning traceability codes in areas subject to board‑separation stress or track‑wear.

 

Chapter 6: Mandatory Inspection Checklist for PCB Panelization and Mass Production Shipping

• The process‑edge width falls within the compliant range of 4–6 mm; for small boards, thin boards, and boards with engraved codes, the ≥5 mm requirement is strictly enforced.
• The process edge is a fully compliant, all‑mechanical zone with no traces, no copper foil, no components, and no functional silkscreen.
• The positioning holes are standard non‑metalized holes with a diameter of Φ3.0 mm, arranged in a diagonally symmetrical pattern, and all clearance distances meet the required specifications.
• The in-vehicle high-precision product has completed the design of a diameter‑differentiation, error‑proof locating hole, effectively preventing incorrect installation orientations.
• SMT optical MARK‑dot layout specifications: the protected area must be free of obstructions and interference to ensure stable visual recognition.
• V‑CUTs, stiffening ribs, and other panel‑splitting features do not encroach upon the process edge, alignment holes, or the core area of the barcode‑etched zone.
• The vehicle-mounted PCB fully implements the dual‑code design of “unique board SN + process‑edge batch common code,” with all area dimensions, spacing, and substrate specifications in full compliance.
• The QR code format, encoding rules, laser engraving process, and weather resistance all fully comply with the IATF 16949 automotive traceability standard.
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• Chapter 7: Conclusion

The process‑edge, alignment holes, and the laser‑etched coding area for vehicle‑mounted two‑dimensional code traceability on PCB panelization are the fundamental reference points that underpin automated mass production and quality traceability in electronic products. Though they appear to be basic structural elements, they directly determine yield rates, batch-to-batch consistency, and the full‑lifecycle traceability of automotive‑grade components.

Adhering strictly to this specification and industry‑leading standards such as IPC and IATF 16949, we implement standardized design practices, eliminating the habit of ad hoc, non‑standardized designs. By unifying dimensional parameters, layout logic, clearance rules, a two‑dimensional code traceability system, and acceptance criteria, we can comprehensively address common production challenges—including pallet misalignment, component placement offset, poor soldering, barcode‑scanning failures, and broken traceability chains—thereby significantly improving first‑pass yield, reducing rework and scrap costs, and ensuring seamless, stable mass production across all product categories in consumer electronics, industrial control, and automotive applications.